<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>RISC-V Distros — Boards · a210</title><link>http://riscv-distros.org/en/boards/a210/</link><description>Which RISC-V distribution runs on which board, where to get images, and the pitfalls to expect.</description><language>en</language><lastBuildDate>Sun, 01 Nov 2026 14:55:59 +0000</lastBuildDate><generator>Hugo</generator><atom:link href="http://riscv-distros.org/en/boards/a210/index.xml" rel="self" type="application/rss+xml"/><item><title>Boards — Zhihe A210 (XuanTie MelonPi dev board)</title><link>http://riscv-distros.org/en/boards/a210/</link><guid isPermaLink="false">board:a210</guid><pubDate>Sun, 01 Nov 2026 00:00:00 +0800</pubDate><description>8-core 64-bit RISC-V: 4× C920 @1.9GHz + 4× C908 @1.9GHz, all with RVV (128-bit); NPU 12 TOPS@INT8 supporting INT4/INT8/FP8/FP16/BF16 and Transformers; LPDDR4X up to 16GB; eMMC5.1; H.265 decode 4K@120fps; the board is a SODIMM compute module plus V1/V2/V3 open carrier boards, 8GB LPDDR4X + 32GB eMMC (figures from a third-party project page)</description><category>ZHIHE A210 (4×C920 + 4×C908)</category></item></channel></rss>